2004 Microchip Technology Inc. Preliminary DS40044B-page 9
PIC16F627A/628A/648A
3.0 ARCHITECTURAL OVERVIEW
The high performance of the PIC16F627A/628A/648A
family can be attributed to a number of architectural
features commonly found in RISC microprocessors. To
begin with, the PIC16F627A/628A/648A uses a
Harvard architecture, in which program and data are
accessed from separate memories using separate
busses. This improves bandwidth over traditional Von
Neumann architecture where program and data are
fetched from the same memory. Separating program
and data memory further allows instructions to be sized
differently than 8-bit wide data word. Instruction
opcodes are 14-bits wide making it possible to have all
single word instructions. A 14-bit wide program mem-
ory access bus fetches a 14-bit instruction in a single
cycle. A two-stage pipeline overlaps fetch and execu-
tion of instructions. Consequently, all instructions (35)
execute in a single-cycle (200 ns @ 20 MHz) except for
program branches.
Table 3-1 lists device memory sizes (Flash, Data and
EEPROM).
TABLE 3-1: DEVICE MEMORY LIST
The PIC16F627A/628A/648A can directly or indirectly
address its register files or data memory. All Special
Function Registers (SFR), including the program
counter, are mapped in the data memory. The
PIC16F627A/628A/648A have an orthogonal (symmet-
rical) instruction set that makes it possible to carry out
any operation, on any register, using any Addressing
mode. This symmetrical nature and lack of ‘special
optimal situations’ make programming with the
PIC16F627A/628A/648A simple yet efficient. In
addition, the learning curve is reduced significantly.
The PIC16F627A/628A/648A devices contain an 8-bit
ALU and working register. The ALU is a general
purpose arithmetic unit. It performs arithmetic and
Boolean functions between data in the working register
and any register file.
The ALU is 8-bit wide and capable of addition,
subtraction, shift and logical operations. Unless
otherwise mentioned, arithmetic operations are two's
complement in nature. In two-operand instructions,
typically one operand is the working register
(W register). The other operand is a file register or an
immediate constant. In single operand instructions, the
operand is either the W register or a file register.
The W register is an 8-bit working register used for ALU
operations. It is not an addressable register.
Depending on the instruction executed, the ALU may
affect the values of the Carry (C), Digit Carry (DC), and
Zero (Z) bits in the Status Register. The C and DC bits
operate as a Borrow
and Digit Borrow out bit,
respectively, bit in subtraction. See the SUBLW and
SUBWF instructions for examples.
A simplified block diagram is shown in Figure 3-1, and
a description of the device pins in Table 3-2.
Two types of data memory are provided on the
PIC16F627A/628A/648A devices. Nonvolatile
EEPROM data memory is provided for long term stor-
age of data such as calibration values, look up table
data, and any other data which may require periodic
updating in the field. These data are not lost when
power is removed. The other data memory provided is
regular RAM data memory. Regular RAM data memory
is provided for temporary storage of data during normal
operation. Data are lost when power is removed.
Device
Memory
Flash
Program
RAM
Data
EEPROM
Data
PIC16F627A 1024 x 14 224 x 8 128 x 8
PIC16F628A 2048 x 14 224 x 8 128 x 8
PIC16F648A 4096 x 14 256 x 8 256 x 8
PIC16LF627A 1024 x 14 224 x 8 128 x 8
PIC16LF628A 2048 x 14 224 x 8 128 x 8
PIC16LF648A 4096 x 14 256 x 8 256 x 8
(144 Seiten)
(48 Seiten)
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